introductory VHDL:- from simulations to sysnthesis (Record no. 23274)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00375nam a2200157 4500 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 978-81-317-0633-6 |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.392 21 |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | sudhakar yalamanchili |
| 245 ## - TITLE STATEMENT | |
| Title | introductory VHDL:- from simulations to sysnthesis |
| 250 ## - EDITION STATEMENT | |
| Edition statement | |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Name of publisher, distributor, etc. | pearson |
| Date of publication, distribution, etc. | NULL |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | 398 |
| 630 ## - SUBJECT ADDED ENTRY--UNIFORM TITLE | |
| Uniform title | VHDL,simulation |
| 630 ## - SUBJECT ADDED ENTRY--UNIFORM TITLE | |
| Uniform title | VHDL,simulation |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | |
| Withdrawn status | Lost status | Damaged status | Not for loan | Collection code | Home library | Current library | Date acquired | Cost, normal purchase price | Total Checkouts | Full call number | Barcode | Date last seen | Price effective from | Koha item type |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Electronics and Communication Engineering | Central Library | Central Library | 26/01/2017 | 485.00 | 621.392 21 | 23274 | 26/01/2017 | 26/01/2017 | Reference |